scas419d ? january 1993 ? revised august 1995 1 post office box 655303 ? dallas, texas 75265 post office box 1443 ? houston, texas 77251?1443 epic ? (enhanced-performance implanted cmos) submicron process member of the texas instruments widebus ? family esd protection exceeds 2000 v per mil-std-883c, method 3015; exceeds 200 v using machine model (c = 200 pf, r = 0) latch-up performance exceeds 250 ma per jedec standard jesd-17 bus hold on data inputs eliminates the need for external pullup / pulldown resistors package options include plastic 300-mil shrink small-outline (dl) and thin shrink small-outline (dgg) packages description the sn74alvc16245 16-bit (dual-octal) noninverting bus transceiver is designed for 2.3-v to 3.6-v v cc operation; it is tested at 2.5-v, 2.7-v, and 3.3-v v cc . the sn74alvc16245 is designed for asynchronous communication between data buses. the control-function implementation minimizes external timing requirements. this device can be used as two 8-bit transceivers or one 16-bit transceiver. it allows data transmission from the a bus to the b bus or from the b bus to the a bus, depending on the logic level at the direction-control (dir) input. the output-enable (oe ) input can be used to disable the device so that the buses are effectively isolated. active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. the sn74alvc16245 is available in ti?s shrink small-outline (dl) and thin shrink small-outline (dgg) packages, which provide twice the i/o pin count and functionality of standard small-outline packages in the same printed-circuit-board area. the sn74alvc16245 is characterized for operation from ? 40 c to 85 c. function table (each 8-bit section) inputs operation oe dir operation l l b data to a bus l h a data to b bus h x isolation please be aware that an important notice concerning avail ability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. dgg or dl package (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1dir 1b1 1b2 gnd 1b3 1b4 v cc 1b5 1b6 gnd 1b7 1b8 2b1 2b2 gnd 2b3 2b4 v cc 2b5 2b6 gnd 2b7 2b8 2dir 1oe 1a1 1a2 gnd 1a3 1a4 v cc 1a5 1a6 gnd 1a7 1a8 2a1 2a2 gnd 2a3 2a4 v cc 2a5 2a6 gnd 2a7 2a8 2oe copyright ? 1995, texas instruments incorporated epic and widebus are trademarks of texas instruments incorporated.
scas419d ? january 1993 ? revised august 1995 2 post office box 655303 ? dallas, texas 75265 post office box 1443 ? houston, texas 77251?1443 logic symbol ? logic diagram (positive logic) 1a2 46 1a3 44 1a4 43 1a5 41 1a6 40 1a7 38 1a8 37 2a2 35 2a3 33 2a4 32 2a5 30 2a6 29 2a7 27 2a8 26 1oe 2oe ? this symbol is in accordance with ansi/ieee std 91-1984 and iec publication 617-12. to seven other channels 1dir 1a1 1b1 1oe 1 47 2 48 to seven other channels 2dir 2a1 2b1 2oe 24 36 13 25 1a1 47 g3 48 3 en1 [ba] 1 1dir 3 en2 [ab] g6 25 6 en4 [ba] 24 2dir 6 en5 [ab] 1b1 2 1b2 3 1b3 5 1b4 6 1b5 8 1b6 9 1b7 11 1b8 12 2a1 36 2b1 13 2b2 14 2b3 16 2b4 17 2b5 19 2b6 20 2b7 22 2b8 23 1 2 5 4
scas419d ? january 1993 ? revised august 1995 3 post office box 655303 ? dallas, texas 75265 post office box 1443 ? houston, texas 77251?1443 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage range, v cc ?0.5 v to 4.6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, vi: except i/o ports (see note 1) ?0.5 v to v cc + 4.6 v . . . . . . . . . . . . . . . . . . . . . . . . . . i/o ports (see notes 1 and 2) ?0.5 v to v cc + 0.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . output voltage range, v o (see notes 1 and 2) ?0.5 v to v cc + 0.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0) ?50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0 or v o > v cc ) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous output current, i o (v o = 0 to v cc ) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current through v cc or gnd 100 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . maximum power dissipation at t a = 55 c (in still air) (see note 3): dgg package 0.85 w . . . . . . . . . . . . . . . dl package 1.2 w . . . . . . . . . . . . . . . . . . storage temperature range, t stg ?65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, a nd functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating conditi ons? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observe d. 2. this value is limited to 4.6 v maximum. 3. the maximum package power dissipation is calculated using a junction temperature of 150 c and a board trace length of 750 mils. for more information, refer to the package thermal considerations application note in the 1994 abt advanced bicmos t echnology data book , literature number scbd002b. recommended operating conditions (see note 4) min max unit v cc supply voltage 2.3 3.6 v v ih high-level input voltage v cc = 2.3 v to 2.7 v 1.7 v v ih high-level input voltage v cc = 2.7 v to 3.6 v 2 v v il low-level input voltage v cc = 2.3 v to 2.7 v 0.7 v v il low-level input voltage v cc = 2.7 v to 3.6 v 0.8 v v i input voltage 0 v cc v v o output voltage 0 v cc v v cc = 2.3 v ?12 i oh high-level output current v cc = 2.7 v ?12 ma i oh high-level output current v cc = 3 v ?24 ma v cc = 2.3 v 12 i ol low-level output current v cc = 2.7 v 12 ma i ol low-level output current v cc = 3 v 24 ma ? t/ ? v input transition rise or fall rate 0 10 ns/ v t a operating free-air temperature ?40 85 c note 4: unused control inputs must be held high or low to prevent them from floating.
scas419d ? january 1993 ? revised august 1995 4 post office box 655303 ? dallas, texas 75265 post office box 1443 ? houston, texas 77251?1443 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions v cc ? t a = ? 40 c to 85 c unit parameter test conditions v cc ? min typ ? max unit i oh = ? 100 a min to max v cc ?0.2 i oh = ? 6 ma, v ih = 1.7 v 2.3 v 2.0 v oh v ih = 1.7 v 2.3 v 1.7 v v oh i oh = ? 12 ma v ih = 2 v 2.7 v 2.2 v i oh = ? 12 ma v ih = 2 v 3 v 2.4 i oh = ? 24 ma, v ih = 2 v 3 v 2 i ol = 100 a min to max 0.2 i ol = 6 ma, v il = 0.7 v 2.3 v 0.4 v ol i ol = 12 ma v il = 0.7 v 2.3 v 0.7 v v ol i ol = 12 ma v il = 0.8 v 2.7 v 0.4 v i ol = 24 ma, v il = 0.8 v 3 v 0.55 i i v i = v cc or gnd 3.6 v 5 a v i = 0.7 v 2.3 v 45 i hold v i = 1.7 v 2.3 v ?45 a i hold v i = 0.8 v 3 v 75 a v i = 2 v 3 v ?75 i oz v o = v cc or gnd 3.6 v 10 a i cc v i = v cc or gnd, i o = 0 3.6 v 40 a i cc v cc = 3 v to 3.6 v, other inputs at v cc or gnd one input at v cc ? 0.6 v, 750 a c i control inputs v i = v cc or gnd 3.3 v 4 pf c io a or b ports v o = v cc or gnd 3.3 v 9 pf ? for conditions shown as min or max, use the appropriate values under recommended operating conditions. ? all typical values are at v cc = 3.3 v. for i/o ports, the parameter i oz includes the input leakage current. switching characteristics over recommended operating free-air temperature range, c l = 50 pf (unless otherwise noted) (see figures 1 and 2) parameter from (input) to (output) v cc = 2.5 v 0.2 v v cc = 2.7 v v cc = 3.3 v 0.3 v unit parameter (input) (output) min max min max min max unit t pd a or b b or a 1 5 4 1 3.6 ns t en oe b or a 1 6.8 6 1 5 ns t dis oe b or a 1 6 5.2 1 5 ns operating characteristics, t a = 25 c parameter test conditions v cc = 2.5 v 0.2 v v cc = 3.3 v 0.3 v unit parameter test conditions typ typ unit c pd power dissipation capacitance outputs enabled c l = 50 pf, f = 10 mhz 22 29 pf c pd power dissipation capacitance outputs disabled c l = 50 pf, f = 10 mhz 4 5 pf
scas419d ? january 1993 ? revised august 1995 5 post office box 655303 ? dallas, texas 75265 post office box 1443 ? houston, texas 77251?1443 parameter measurement information v cc = 2.5 v 0.2 v v oh v ol t h t su from output under test c l = 50 pf (see note a) load circuit s1 4.6 v open gnd 500 ? 500 ? t plh t phl output control (low-level enabling) output waveform 1 s1 at 4.6 v (see note b) output waveform 2 s1 at gnd (see note b) t pzl t pzh t plz t phz 1.2 v 1.2 v 1.2 v 1.2 v 2.3 v 0 v 1.2 v 1.2 v v oh v ol 0 v 1.2 v v ol + 0.3 v 1.2 v v oh ? 0.3 v 0 v 1.2 v 2.3 v 0 v 1.2 v 1.2 v 0 v 2.3 v 0 v 1.2 v 1.2 v t w input 2.3 v 2.3 v 2.3 v voltage waveforms setup and hold times voltage waveforms propagation delay times voltage waveforms pulse duration voltage waveforms enable and disable times timing input data input output input t pd t plz /t pzl t phz /t pzh open 4.6 v gnd test s1 notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 ? , t r 2.5 ns, t f 2.5 ns. d. the outputs are measured one at a time with one transition per measurement. e. t plz and t phz are the same as t dis . f. t pzl and t pzh are the same as t en . g. t plh and t phl are the same as t pd . figure 1. load circuit and voltage waveforms
scas419d ? january 1993 ? revised august 1995 6 post office box 655303 ? dallas, texas 75265 post office box 1443 ? houston, texas 77251?1443 parameter measurement information v cc = 2.7 v and 3.3 v 0.3 v v oh v ol t h t su from output under test c l = 50 pf (see note a) load circuit s1 6 v open gnd 500 ? 500 ? t plh t phl output control (low-level enabling) output waveform 1 s1 at 6 v (see note b) output waveform 2 s1 at gnd (see note b) t pzl t pzh t plz t phz 1.5 v 1.5 v 1.5 v 1.5 v 2.7 v 0 v 1.5 v 1.5 v v oh v ol 0 v 1.5 v v ol + 0.3 v 1.5 v v oh ? 0.3 v 0 v 1.5 v 2.7 v 0 v 1.5 v 1.5 v 0 v 2.7 v 0 v 1.5 v 1.5 v t w input 2.7 v 2.7 v 3 v voltage waveforms setup and hold times voltage waveforms propagation delay times voltage waveforms pulse duration voltage waveforms enable and disable times timing input data input output input t pd t plz /t pzl t phz /t pzh open 6 v gnd test s1 notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 ? , t r 2.5 ns, t f 2.5 ns. d. the outputs are measured one at a time with one transition per measurement. e. t plz and t phz are the same as t dis . f. t pzl and t pzh are the same as t en . g. t plh and t phl are the same as t pd . figure 2. load circuit and voltage waveforms
package option addendum www.ti.com 11-apr-2013 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) op temp (c) top-side markings (4) samples SN74ALVC16245DGGR obsolete tssop dgg 48 tbd call ti call ti -40 to 85 sn74alvc16245dl obsolete ssop dl 48 tbd call ti call ti -40 to 85 sn74alvc16245dlr obsolete ssop dl 48 tbd call ti call ti -40 to 85 (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) multiple top-side markings will be inside parentheses. only one top-side marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire top-side marking for that device. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
mechanical data mtss003d january 1995 revised january 1998 post office box 655303 ? dallas, texas 75265 dgg (r-pdso-g**) plastic small-outline package 4040078 / f 12/97 48 pins shown 0,25 0,15 nom gage plane 6,00 6,20 8,30 7,90 0,75 0,50 seating plane 25 0,27 0,17 24 a 48 1 1,20 max m 0,08 0,10 0,50 0 8 56 14,10 13,90 48 dim a max a min pins ** 12,40 12,60 64 17,10 16,90 0,15 0,05 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold protrusion not to exceed 0,15. d. falls within jedec mo-153
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